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LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY TransceiversDatasheet 115Document Number: 249241Revision Number: 007Revision Date: August 28, 2003E11, F9, F10, F11, G9, G10, G11, H9, H10, H11, J9, J10, J11, K11, L11AVSS –Analog Ground.Ground return for analog supply (AVCC). all grounds can be tied together using a single ground plane.D7, L7 VCCD –Digital Power Supply - Core. +2.5 V supply for core digital circuits.D4, F4, H4, L3, L5, VCCIO –Digital Power Supply - I/O Ring. +2.5/3.3 V supply for digital I/O circuits. The digital input circuits running off of this rail, having a TTL-level threshold and over-voltage protection, may be interfaced with 3.3/5.0 V, when the IO supply is 3.3 V, and 2.5/3.3/5.0 V when 2.5 V.A1, A2, A3, B1, B2, B5, B10, D9, D11, E5, E6, E9, E10, F5, F6, F7, F8, G4, G6, G7, G8, H6, H7, H8, J5, J6, J7, J8, K5, K6, K9, K10, L2, N1, N11, P1, P11GNDD –Digital Ground.Ground return for core digital supplies (VCCD). All ground pins can be tied together using a single ground plane.C8 SGND –Substrate Ground.Ground for chip substrate. All ground pins can be tied together using a single ground plane.Unused/Reserved BallsC4, C7, D1, D2, D5, D6, D8, D10, E4, E7, G2, G5, H1, H5, J4, K4, K7, L1, L6, L8, L10, M4, M5, M6, M7, M8, P2, P3N/C – No Connection.Table 39. Intel® LXT9785 BGA15 Signal Descriptions (Sheet 7 of 7)BGA15 Ball DesignationSymbol Type Signal Description1. Type Column Coding: I = Input, O = Output, OD = Open Drain output, ST = Schmitt Triggered input, TS = Three-State-able output, SL = Slew-rate Limited output, IP = weak Internal Pull-up, ID = weak Internal pull-Down.